EUSIPCO'2002 banner

Paper data
-----
Title:
Architecture and application partitionning for reconfigurable system design

Author(s):
Karim Ben Chehida, I3S, University of Nice Sophia Antipolis, CNRS
Michel Auguin, I3S, University of Nice Sophia Antipolis, CNRS
Sebastien Raimbault, I3S, University of Nice Sophia Antipolis, CNRS

Page numbers in the proceedings:
Volume II pp 249-252

Session:
Implementation

Paper abstract
-----
This paper presents a Genetic Algorithm (GA) based approach for Hardware/Software partitioning targeting an architecture composed of a processor and a dynamically reconfigurable datapath (FPGA). From an acyclic task graph and a set of Area-Time implementation trade offs points for each task, our GA performs HW/SW partitioning and scheduling such that the global application execution time is minimized. The efficiency of our GA is established through its application to a AC-3 decoder function and its performance is compared with a greedy algorithm.

Paper
-----
A PDF version is available here

-----