AN ENERGY-EFFICIENT RECONFIGURABLE FFT/IFFT PROCESSOR BASED ON A MULTI-PROCESSOR RING (FriAmPO2)

Author(s) : Guichang Zhong (University of California, Los Angeles, USA) Fan Xu (University of California, Los Angeles, USA) Alan Jr Willson (University of California, Los Angeles, USA)

Abstract : We have designed and built a single-chip reconfigurable FFT/IFFT processor that employs a ring-structured multiprocessor architecture. Multi-level reconfigurability is realized by dynamically allocating computation resources required by specific applications. The processor IC has been fabricated in TSMC 0.25-um CMOS. It performs 8-point to 4096-point FFT/IFFT with power-scalable features and provides useful trade-offs between algorithm flexibility, implementation complexity and energy efficiency.

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