Session : FriAmPO2 FPGA and SoC Realizations
   Time: 09:00 - 10:40

    Chair:     Fabrizio Vacca , Politecnico di Torino, Italy

 
ON THE DESIGN AND FPGA IMPLEMENTATION OF REAL-TIME SCANNED-ARRAY 2D FREQUENCY-PLANAR BEAM FILTERS (Abstract)
Arjuna Madanayake (University of Calgary, Canada)
Leonard Bruton (University of Calgary, Canada)
 
 
DESIGN FLOW IMPROVEMENTS FOR EMBEDDED WIRELESS RECEIVERS (Abstract)
Bastian Knerr (CD-Laboratory, INTHFT, TU Vienna, Austria)
Pavle Belanovic (CD-Laboratory, INTHFT, TU Vienna, Austria)
Martin Holzer (CD-Laboratory, INTHFT, TU Vienna, Austria)
Guillaume Sauzon (Infineon Technologies SMS, Vienna, Austria)
Markus Rupp (INTHFT, TU Vienna, Austria)
 
 
AN EFFICIENT FPGA IMPLEMENTATION OF A FLEXIBLE JPEG2000 DECODER FOR DIGITAL CINEMA (Abstract)
Antonin Descampe (UCL - Communications and Remote Sensing Lab, Belgium)
Franois Devaux (UCL - Communications and Remote Sensing Lab, Belgium)
Gal Rouvroy (UCL - Microelectronics Lab, Belgium)
Benot Macq (UCL - Communications and Remote Sensing Lab, Belgium)
Jean-Didier Legat (UCL - Microelectronics Lab, Belgium)
 
 
AN ENERGY-EFFICIENT RECONFIGURABLE FFT/IFFT PROCESSOR BASED ON A MULTI-PROCESSOR RING (Abstract)
Guichang Zhong (University of California, Los Angeles, USA)
Fan Xu (University of California, Los Angeles, USA)
Alan Jr Willson (University of California, Los Angeles, USA)
 
 
EMBEDDING QUANTUM CRYPTOGRAPHY ON DSP-BOARDS (Abstract)
Roland Lieger (ARC Seibersdorf research GmbH, Austria)
Thomas Lornser (ARC Seibersdorf research GmbH, Austria)
Gerhard Humer (ARC Seibersdorf research GmbH, Austria)
Florian Schupfer (ARC Seibersdorf research GmbH, Austria)
 
 
A NEW VECTOR PROCESSOR ARCHITECTURE FOR HIGH PERFORMANCE SIGNAL PROCESSING (Abstract)
Andreas Bolzer (On Demand Microelectronics, Austria)
Gerald Krottendorfer (On Demand Microelectronics, Austria)
Manfred Riener (On Demand Microelectronics, Austria)
 
 
AN OPTIMISED SYSTOLIC ARRAY-BASED MATRIX INVERSION FOR RAPID PROTOTYPING OF KALMAN FILTERS IN FPGAS (Abstract)
Yat Tin Lai (The University of Auckland, New Zealand)
Abbas Bigdeli (The University of Auckland, New Zealand)
Morteza Biglari-Abhari (The University of Auckland, New Zealand)
 
 
ARCHITECTURE DESIGN FOR FPGA IMPLEMENTATION OF FINITE INTERVAL CMA (Abstract)
Antonin Hermanek (UTIA AV CR, Czech Republic)
Jan Schier (UTIA AV CR, Czech Republic)
Phillip Regalia (INT-Evry, France)
 
 
AUDIO-VIDEO TERMINAL SYSTEM-ON-CHIP SIMULATION (Abstract)
Ivano Barbieri (DIBE University of Genova, ITALY)
Massimo Bariani (DIBE University of Genova, ITALY)
Marco Raggio (DIBE University of Genova, ITALY)
Alessandro Scotto (DIBE University of Genova, ITALY)
 
 
EXPLORING JPEG-2000 ENTROPY CODER IMPLEMENTATIONS ON XILINX VIRTEX-II PRO PLATFORMS (Abstract)
Omar Hammami (ENSTA, FRANCE)
Riad Benmouhoub (ENSTA, FRANCE)
Imed Aouadi (ENSTA, FRANCE)
 
Menu